I am currently Staff Engineer at AMD, focusing on performane of I/O module designs for the next generation of AMD AI and Data Cener products. I completed my Ph.D. in Computer Engineering at the University of Waterloo in December 2021, and my research has contributed to several publications in “shared hardware arbitration and high-performance frameworks for real-time systems”. I have extensive research expertise in real-time systems and I have serrved as either Technical Program Committee member or reviewer of premier real-time conferences and symposiums including RTAS, RTSS, ECRTS, and RTNS. Before the Ph.D program at University of Waterloo, I have received my M.Sc. from Sharif University of Technology in Computer Engineering.
Ph.D. in Computer Engineering, University of Waterloo
MS.c. in Computer Engineering, Sharif University of Technology
BS.c. in Computer Engineering, University of Guilan
10- AMD Leadership Recognition Award, AMD, April 2023.
9- AMD Leadership Recognition Award, AMD, October 2022.
8- Doctoral Thesis Completion Award (DTCA), University of Waterloo, September 2021.
7- Faculty of Engineering (FOE) Award, University of Waterloo, February 2021.
6- Faculty of Engineering (FOE) Award, University of Waterloo, November 2020.
5- Sir Sandford Flemming Foundation Award, University of Waterloo, November 2020.
4- Faculty of Engineering (FOE) Award, University of Waterloo, July 2020.
3- Xilinx trainer certification on Ultrascale+ MPSoC platform, Xilinx Inc., February 2020.
2- Outstanding Paper Award, Euromicro Conference on Real-Time Systems (ECRTS), June 2019.
1- Ranked 1st among all undergraduate CE program students (~130 students), July 2013.
Secretary of Professional Activities with IEEE Canada Kitchener/Waterloo Section.
6- Technical Program Committee Member in Real-time Application Symposium RTAS AE 2024. Link
5- Technical Program Committee Member in Real-time Application Symposium RTAS AE 2022. Link
4- External Reviewer in Real-time System Symposium RTSS 2021. Link
3- External Reviewer in Euromicro Conference on Real-Time Systems ECRTS 2021. Link
2- External Reviewer in Real-time Application Symposium RTAS 2021. Link
1- External Reviewer in Real-time System Symposium RTSS 2020. Link
11- Tabish, R., Pellizzoni, Mancuso, R., R., Gracioli, G., Mirosanlou, R., Caccamo, M.. X-Stream: Accelerating streaming segments on MPSoCs for real-time applications. Journal of Systems Architecture. Link
10- Kloda, T., Gracioli, G., Tabish, R., Mirosanlou, R., Mancuso, R., Pellizzoni, R., Caccamo, M.. Lazy Load Scheduling for Mixed-Criticality Applications Heterogeneous MPSoCs. ACM Transaction on Embedded Computing Systems (TECS) Link
9- Mirosanlou, R., Hassan, M., Pellizzoni, R.. Parallelism-Aware High-Performance Cache Coherence with Tight Latency Bounds. To appear at 34th Euromicro Conference on Real-Time Systems (ECRTS 2022), Modena, Italy, 2022. Link
8- Mirosanlou, R., Hassan, M., & Pellizzoni, R.. DuoMC: Tight DRAM Latency Bounds with Shared Banks and Near-COTS Performance. Accepted in ACM International Symposium on Memory Systems (MEMSYS’21), Washington D.C., USA, 2021. Download PDF
7- Mirosanlou, R., Hassan, M., & Pellizzoni, R.. Duetto: Latency Guarantees at Minimal Performance Cost. In IEEE/ACM Design, Automation and Test in Europe Conference (DATE’21), Grenoble, France, 2021. Download PDF
6- Mirosanlou, R., Guo, D., Hassan, M., & Pellizzoni, R.. MCsim: An Extensible DRAM Memory Controller Simulator. In IEEE Computer Architecture Letters (CAL), pp. 105–109 2020. Download PDF
5- Mirosanlou, R., Hassan, M., & Pellizzoni, R.. (2020). DRAMbulism: Balancing Performance and Predictability through Dynamic Pipelining. In 26th IEEE Real-time and Embedded Technology and Applications Symposium (RTAS’20). Sydney, Australia. Download PDF
4- Mirosanlou, R., Hassan, M., & Pellizzoni, R.. (2020). Appendix on Balancing Performance and Predictability through Dynamic Pipelining. University of Waterloo, UWspace, 2020. Download PDF
3- Gracioli, G., Tabish, R., Mancuso, R., Mirosanlou, R., Pellizzoni, R., & Caccamo, M.. (2019). Designing mixed criticality applications on modern heterogeneous mpsoc platforms. In 31st Euromicro Conference on Real-Time Systems (ECRTS’19) - Best Paper Nomination. Stuttgart, Germany, 2019. Download PDF
2- Mirosanlou, R., Taram, M., Shirmohammadi, Z., & Miremadi, S. - G.. (2019). 3DCAM: A Low Overhead Crosstalk Avoidance Mechanism for TSV-Based 3D ICs. arXiv preprint arXiv:1901.00568, accepted in International Conference on Computer Design (ICCD’15). New York, USA. Download PDF
1- Gracioli, G., Tabish, R., Mirosanlou, R., Mancuso, R., Pellizzoni, R., & Caccamo, M.. (2019). Tech Report: A Virtualized Scratchpad-Based Architecture for Real-time Event-Triggered Applications, Technical University of Munich. Download PDF